加拿大华人论坛 加拿大生活信息Open ASIC design position in Great Vancouver
在加拿大
公司内部推荐职位。如果有真货并且有兴趣,悄悄话。Staff Product Design Engineer StaffJob Responsibilities:• Design and develop complex digital integrated circuits at the block, subsystem or device level ( 100K to 10M+ gates), which are coded in System verilog/VHDL• Work with team lead to define subsystem/block feature sets, encapsulate design and implementation into engineering document and registers document• Ability to perform development activities such as Formal Verification, design for Testability (DFT), synthesizing the hardware logic, and Static Timing Analysis• Support FPGA emulation, ASIC lab validation including debugging in the lab, identifying the issues and providing workaround solutions• Possible to write and execute testcases according to the verification test plans to verify these complex designs. Track down bugs and technical problems and work with the design team to ensure timely resolution.• Communicate regularly with the design and verification team in USA and India to resolve issues, communicate status and solve technical problems. • Read and understand applicable communication protocol standards.Job Qualifications:• Bachelor’s degree on Electrical Engineering or Computer Engineering • 7-9 years related experience • Excellent analytical and debugging skills and the ability to proactively solve issues. • Excellent teamwork and time management skills and the ability to work under pressure. • Proven ability to learn and adapt to new methodologies and technologies. • Excellent verbal and written communication skills in English. • Excellent scripting and programming skills. Experience using Verilog/VHDL is required and experience with using Specman/System Verilog is preferred. • Working knowledge with Design and Verification tools such as Design Compiler, Cadence NC-Sim, waveform viewers, and other similar tools. • Working knowledge of ASIC design processes (design, verification, implementation, layout) and flows.• Protocol knowledge and experience in PCI-Express and/or SAS/SATA will be an assetStaff Product Design Engineer StaffTracking Code1040410001Job DescriptionAbout the Job:Division: ESDLocation: Burnaby, BCJob Responsibilities:• Design and develop complex digital integrated circuits at the block, subsystem or device level ( 100K to 10M+ gates), which are coded in System verilog/VHDL• Work with team lead to define subsystem/block feature sets, encapsulate design and implementation into engineering document and registers document• Ability to perform development activities such as Formal Verification, design for Testability (DFT), synthesizing the hardware logic, and Static Timing Analysis• Support FPGA emulation, ASIC lab validation including debugging in the lab, identifying the issues and providing workaround solutions• Possible to write and execute testcases according to the verification test plans to verify these complex designs. Track down bugs and technical problems and work with the design team to ensure timely resolution.• Communicate regularly with the design and verification team in USA and India to resolve issues, communicate status and solve technical problems. • Read and understand applicable communication protocol standards.Job Qualifications:• Bachelor’s degree on Electrical Engineering or Computer Engineering • 7-9 years related experience • Excellent analytical and debugging skills and the ability to proactively solve issues. • Excellent teamwork and time management skills and the ability to work under pressure. • Proven ability to learn and adapt to new methodologies and technologies. • Excellent verbal and written communication skills in English. • Excellent scripting and programming skills. Experience using Verilog/VHDL is required and experience with using Specman/System Verilog is preferred. • Working knowledge with Design and Verification tools such as Design Compiler, Cadence NC-Sim, waveform viewers, and other similar tools. • Working knowledge of ASIC design processes (design, verification, implementation, layout) and flows.• Protocol knowledge and experience in PCI-Express and/or SAS/SATA will be an assetPosition TypeFull-Time/Regular
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回复: Open ASIC design position in Great Vancouver小弟是干这个的,只是目前还在准备技术移民中。请问老兄,做这个的在加拿大就业还行吗?或者我直接试试这个只为,只是我经验没那么多,但是应该能胜任,可以考虑吗?
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