加拿大华人论坛 加拿大生活信息Open ASIC design position in Great Vancouver



在加拿大


公司内部推荐职位。如果有真货并且有兴趣,悄悄话。Staff Product Design Engineer StaffJob Responsibilities:• Design and develop complex digital integrated circuits at the block, subsystem or device level ( 100K to 10M+ gates), which are coded in System verilog/VHDL• Work with team lead to define subsystem/block feature sets, encapsulate design and implementation into engineering document and registers document• Ability to perform development activities such as Formal Verification, design for Testability (DFT), synthesizing the hardware logic, and Static Timing Analysis• Support FPGA emulation, ASIC lab validation including debugging in the lab, identifying the issues and providing workaround solutions• Possible to write and execute testcases according to the verification test plans to verify these complex designs. Track down bugs and technical problems and work with the design team to ensure timely resolution.• Communicate regularly with the design and verification team in USA and India to resolve issues, communicate status and solve technical problems. • Read and understand applicable communication protocol standards.Job Qualifications:• Bachelor’s degree on Electrical Engineering or Computer Engineering • 7-9 years related experience • Excellent analytical and debugging skills and the ability to proactively solve issues. • Excellent teamwork and time management skills and the ability to work under pressure. • Proven ability to learn and adapt to new methodologies and technologies. • Excellent verbal and written communication skills in English. • Excellent scripting and programming skills. Experience using Verilog/VHDL is required and experience with using Specman/System Verilog is preferred. • Working knowledge with Design and Verification tools such as Design Compiler, Cadence NC-Sim, waveform viewers, and other similar tools. • Working knowledge of ASIC design processes (design, verification, implementation, layout) and flows.• Protocol knowledge and experience in PCI-Express and/or SAS/SATA will be an assetStaff Product Design Engineer StaffTracking Code1040410001Job DescriptionAbout the Job:Division: ESDLocation: Burnaby, BCJob Responsibilities:• Design and develop complex digital integrated circuits at the block, subsystem or device level ( 100K to 10M+ gates), which are coded in System verilog/VHDL• Work with team lead to define subsystem/block feature sets, encapsulate design and implementation into engineering document and registers document• Ability to perform development activities such as Formal Verification, design for Testability (DFT), synthesizing the hardware logic, and Static Timing Analysis• Support FPGA emulation, ASIC lab validation including debugging in the lab, identifying the issues and providing workaround solutions• Possible to write and execute testcases according to the verification test plans to verify these complex designs. Track down bugs and technical problems and work with the design team to ensure timely resolution.• Communicate regularly with the design and verification team in USA and India to resolve issues, communicate status and solve technical problems. • Read and understand applicable communication protocol standards.Job Qualifications:• Bachelor’s degree on Electrical Engineering or Computer Engineering • 7-9 years related experience • Excellent analytical and debugging skills and the ability to proactively solve issues. • Excellent teamwork and time management skills and the ability to work under pressure. • Proven ability to learn and adapt to new methodologies and technologies. • Excellent verbal and written communication skills in English. • Excellent scripting and programming skills. Experience using Verilog/VHDL is required and experience with using Specman/System Verilog is preferred. • Working knowledge with Design and Verification tools such as Design Compiler, Cadence NC-Sim, waveform viewers, and other similar tools. • Working knowledge of ASIC design processes (design, verification, implementation, layout) and flows.• Protocol knowledge and experience in PCI-Express and/or SAS/SATA will be an assetPosition TypeFull-Time/Regular

评论
回复: Open ASIC design position in Great Vancouver小弟是干这个的,只是目前还在准备技术移民中。请问老兄,做这个的在加拿大就业还行吗?或者我直接试试这个只为,只是我经验没那么多,但是应该能胜任,可以考虑吗?

  ·中文新闻 足球明星因“f****t”爆发而被禁赛五场,威尔·鲍威尔在 Instag
·中文新闻 Corporate Fighter倒闭:悉尼健身公司进入破产管理程序,取消所有

加拿大生活信息-加拿大

加拿大老人金

华人网大家好: 我父母來了加拿大都已經十年啦,開始準備申請加拿大老人金。 本人對這項福利都還好迷茫,希望各位多多指教, 多謝!本人父母居住加拿大已經十年,過去十年,沒有工作 ...

加拿大生活信息-加拿大

不想在温哥华了想去农村

华人网不想在大城市了,从出生到现在一直在大城市,来到温哥华,这房价和工资的不对等更搞得无法呼吸。来加拿大又不是奔着这些来的,加上本人很佛系,现在就梦想找一份WFH的工作到乡 ...

加拿大生活信息-加拿大

从首尔转机回加拿大

华人网今天送老公先回加拿大,从沈阳出发经首尔当天飞多伦多。 给老公买的是沈阳至首尔 大韩航空的 从首尔到多伦多 加拿大航空 行李在沈阳可以直挂到多伦多 给了两段航程的登机牌 行李 ...

加拿大生活信息-加拿大

赏花:蒲公英晚期?

华人网郁金香正在凋谢,蒲公英也进入最后的一搏。这个时候,她们已经不像小黄花绽放时那么可爱了(应该说多数人是这么感觉的),但仔细观赏,我还是很喜欢的。心中喜乐,到处都是美 ...